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No commits in common. "7ae98d8353550ac79a0048a74ca11a6869497b8b" and "fba8c1f2f41c7b3aba2b8b9f1f5c2d829518d3a5" have entirely different histories.
7ae98d8353
...
fba8c1f2f4
2
Makefile
2
Makefile
@ -26,7 +26,7 @@ all:${MAIN_ROM}
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first: ${OBJECT_FILES}
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${QUIET_LINK}
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${Q}gcc -ggdb $^ -fsanitize=address -fsanitize=undefined -fsanitize=leak -lncursesw -ltinfow -lm -o $@
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${Q}gcc -ggdb $^ -fsanitize=address -fsanitize=undefined -fsanitize=leak -lncursesw -ltinfow -o $@
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%.rom:%.asm first
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$(QUIET_FAS)
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28
assembly.c
28
assembly.c
@ -112,10 +112,6 @@
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// | 14'hC | Floating point addition | YES | operand 1 | operand 2 |
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// +-------+---------------------------------------------+--------------+------------+------------+
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// | 14'hD | Floating point subtraction | YES | operand 1 | operand 2 |
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// +-------+---------------------------------------------+--------------+------------+------------+
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// | 14'hE | Calculate the sin of a register | YES | operand | |
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// +-------+---------------------------------------------+--------------+------------+------------+
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// | 14'hF | Calculate the cos of a register | YES | operand | |
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//
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//
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// INSTRUCTION FORMAT 2 OPCODE NUM:
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@ -227,12 +223,6 @@ char *disassemble(uint32_t opcode_be){
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case 0x0D:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"FSUB %%R%0d,%%R%0d",val1,val2);
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break;
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case 0x0E:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"SIN %%R%0d",val1);
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break;
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case 0x0F:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"COS %%R%0d",val1);
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break;
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default:
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snprintf(ret,MAX_INSTRUCTION_LENGTH,"UNRECOGNISED INSTRUCTION");
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break;
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@ -426,29 +416,21 @@ int64_t assemble_line(char *line, struct assembler_context_t *assembler_context)
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opcode=0x2004;
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params=2;
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}else if(strncmp(line,"FDIV ",5)==0){
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x=4;
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x=5;
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opcode=0x200A;
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params=2;
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}else if(strncmp(line,"FMUL ",5)==0){
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x=4;
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x=5;
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opcode=0x200B;
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params=2;
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}else if(strncmp(line,"FADD ",5)==0){
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x=4;
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x=5;
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opcode=0x200C;
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params=2;
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}else if(strncmp(line,"FSUB ",5)==0){
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x=4;
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x=5;
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opcode=0x200D;
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params=2;
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}else if(strncmp(line,"SIN ",4)==0){
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x=3;
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opcode=0x200E;
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params=1;
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}else if(strncmp(line,"COS ",4)==0){
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x=3;
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opcode=0x200F;
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params=1;
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}else
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params=0;
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if(params!=0){
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@ -481,7 +463,7 @@ int64_t assemble_line(char *line, struct assembler_context_t *assembler_context)
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}else
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return -2;
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}else
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return (opcode<<16)|r0<<8;
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return (opcode<<16)|r0<<2;
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}else
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return -2;
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}else
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19
cpu.c
19
cpu.c
@ -1,7 +1,6 @@
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#include "simdata.h"
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#include "cpu.h"
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#include <stdlib.h>
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#include <math.h>
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@ -95,8 +94,6 @@ int decode(struct simdata_t *simdata){
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case 0x0B:
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case 0x0C:
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case 0x0D:
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case 0x0E:
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case 0x0F:
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simdata->exec_data->in_op1->OP_ADDR=REGISTER;
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simdata->exec_data->in_op2->OP_ADDR=REGISTER;
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break;
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@ -140,10 +137,8 @@ int decode(struct simdata_t *simdata){
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simdata->exec_data->out_op->OP_ADDR=REGISTER;
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simdata->exec_data->out_op->data=op2;
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break;
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case 0x02:
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case 0x03:
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case 0x0E:
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case 0x0F:
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case 2:
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case 3:
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simdata->exec_data->out_op->OP_ADDR=REGISTER;
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simdata->exec_data->out_op->data=op1;
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break;
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@ -174,8 +169,6 @@ int decode(struct simdata_t *simdata){
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case 0x0B: simdata->exec_data->ALU_OP=ALU_FMUL; break;
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case 0x0C: simdata->exec_data->ALU_OP=ALU_FADD; break;
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case 0x0D: simdata->exec_data->ALU_OP=ALU_FSUB; break;
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case 0x0E: simdata->exec_data->ALU_OP=ALU_FSIN; break;
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case 0x0F: simdata->exec_data->ALU_OP=ALU_FCOS; break;
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default:
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return 1;
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}
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@ -319,12 +312,6 @@ int exec(struct simdata_t *simdata){
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*(float*)&result = *(float*)(&simdata->registers->GPR[simdata->exec_data->in_op2->data])-
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*(float*)(&simdata->registers->GPR[simdata->exec_data->in_op1->data]);
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break;
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case ALU_FSIN:
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*(float*)&result = sinf(*(float*)(&simdata->registers->GPR[simdata->exec_data->in_op1->data]));
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break;
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case ALU_FCOS:
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*(float*)&result = cosf(*(float*)(&simdata->registers->GPR[simdata->exec_data->in_op1->data]));
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break;
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default:
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return 1;
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}
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@ -393,7 +380,6 @@ int exec(struct simdata_t *simdata){
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simdata->RAM[simdata->registers->SP ]=simdata->registers->GPR[simdata->exec_data->in_op1->data]&0x000000FF;
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simdata->RAM[simdata->registers->SP+1]=(simdata->registers->GPR[simdata->exec_data->in_op1->data]&0x0000FF00)>>8;
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simdata->RAM[simdata->registers->SP+2]=(simdata->registers->GPR[simdata->exec_data->in_op1->data]&0x00FF0000)>>16;
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simdata->RAM[simdata->registers->SP+3]=(simdata->registers->GPR[simdata->exec_data->in_op1->data]&0xFF000000)>>24;
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simdata->registers->SP+=4;
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break;
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case POP:
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@ -401,7 +387,6 @@ int exec(struct simdata_t *simdata){
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simdata->registers->GPR[simdata->exec_data->in_op1->data]=simdata->RAM[simdata->registers->SP];
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simdata->registers->GPR[simdata->exec_data->in_op1->data]|=simdata->RAM[simdata->registers->SP+1]<<8;
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simdata->registers->GPR[simdata->exec_data->in_op1->data]|=simdata->RAM[simdata->registers->SP+2]<<16;
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simdata->registers->GPR[simdata->exec_data->in_op1->data]|=simdata->RAM[simdata->registers->SP+3]<<24;
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break;
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}
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add_to_instr_list(&simdata->cpu_gui_hints->executing_list,simdata->exec_data->address);
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