COMS30046_2022_TB-2_playground/verilog_iverilog/VPI_example/Makefile

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Makefile
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OBJECTS= hello.vvp hello.o
CFLAGS = -Wall -O $(CFLAGS_$@)
simulate: ${OBJECTS}
vvp -M. -mhello hello.vvp
%.o:%.c
iverilog-vpi $< --name $(subst .o,,$@)
%.vvp:%.v
iverilog $^ -o $@
clean:
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rm ${OBJECTS} hello.vpi -f