diff --git a/8086_documentation.md.bak b/8086_documentation.md.bak deleted file mode 100644 index 65da2fa..0000000 --- a/8086_documentation.md.bak +++ /dev/null @@ -1,50 +0,0 @@ -## ISA -Instructions vary from 1 to 6 bytes. - -### Instructions format -| 6bit | 1bit | 1bit | 2bit | 3bit | 3bit | -| ---------------- | --------- | ---- | ---- | ---- | ---- | -| Opcode | D bit | W bit | MOD | REG | R/M | - -* **D**-bit : the register specified in the Register ID field is a source register (D = 0) or destination register (D =1). -* **W**-bit : specifies whether the instruction is a byte instruction (W = 0) or a word instruction (W = 1). - -On some instructions: - -* **S**-bit : An 8-bit 2’s complement number. It can be extended to a 16-bit 2’s complement number depending on the W-bit by making all of the bits in the higher-order byte equal the most significant bit in the low order byte. This is known as sign extension. - -| S | W | Operation | -| --- | --- | -------------- | -| 0 | 0 | 8bit operation | -| 0 | 1 | 16bit operation with 16bit immediate operand | -| 1 | 0 | invalid? | -| 1 | 1 | 16bit operation with a sign extended 8bit immediate operand - -* **V**-bit : V-bit decides the number of shifts for rotate and shift instructions. If V = 0, then count = 1; if V = 1, the count is in CL register. For example, if V = 1 and CL = 2 then shift or rotate instruction shifts or rotates 2-bits -* **Z**-bit : Used as a compare bit with the zero flag in conditional repeat and loop instructions. ex branch if zero is set or clear. - -| Register ID / REG | Register Name | -|:-------------------:|:-------------:| -| 0 0 0 | AL AX | -| 0 0 1 | CL CX | -| 0 1 0 | DL DX | -| 0 1 1 | BL BX | -| 1 0 0 | AH SP | -| 1 0 1 | CH BP | -| 1 1 0 | DH SI | -| 1 1 1 | BH DI | - -The second byte of the instruction usually identifies the insturction's operands. The **MOD** (mode) field weather on of the operands is in memory or if both are registers. In some instructions like the immediate-to-memory type the **REG** field is used as an extension of the opcode. The encoding of **R/M** depends on how MOD is set. if MOD=11 (register-register mode) then **R/M** specifies the second Register using the Register ID. otherwise it specifies how the effective address in memory is calculated - -Some instructions have the following - -|R/M | Memory Mode with no displacement [ 0 0 ] | Memory mode with 8 bit displacement [ 0 1 ] | Memory Mode with 16 bit displacement [ 1 0 ] | Register Mode [ 1 1 ] W = 0| Register Mode [ 1 1 ] W = 1 | -|---- | ---------------------------------------- | ------------------------------------------- | -------------------------------------------- | --------------------------- | --------------------------- | -|000 | [BX] + [SI] | [BX] + [SI] + d8 | [BX] + [SI] + d16 | AL | AX | -|001 | [BX] + [DI] | [BX] + [DI] + d8 | [BX] + [DI] + d16 | CL | CX | -|010 | [BP] + [SI] | [BP] + [SI] + d8 | [BP] + [SI] + d16 | DL | DX | -|011 | [BP] + [DI] | [BP] + [DI] + d8 | [BP] + [DI] + d16 | BL | BX | -|100 | [SI] | [SI] + d8 | [SI] + d16 | AH | SP | -|101 | [DI] | [DI] + d8 | [DI] + d16 | CH | BP | -|110 | d16 (direct) | [BP] + d8 | [BP] + d16 | DH | SI | -|111 | [BX] | [BX] + d8 | [BX] + d16 | BH | DI |