diff --git a/8086_documentation.md b/8086_documentation.md
index 02e4d70..b60528b 100644
--- a/8086_documentation.md
+++ b/8086_documentation.md
@@ -45,7 +45,7 @@ Example instructions:
| Bytecode | AT&T Syntax | meaning |
| ---------- | --------------- | ---------------------------------------------------------- |
|81 c0 aa 55 | add $0x55aa,%ax | add 0x55aa to register ax |
-|03 06 aa 55 | add 0x55aa,%ax | add the contents of memory locaton 0x55aa to register ax |
+|03 06 aa 55 | add 0x55aa,%ax | add the contents of memory location 0x55aa to register ax |
|fe c0 | inc %al | increment register al |
|ff c0 | inc %ax | increment register ax |
|40 | inc %ax | increment register ax |
diff --git a/README.md b/README.md
index 44e3c03..b4b28a0 100644
--- a/README.md
+++ b/README.md
@@ -1,6 +1,5 @@
-
+
-#
A CPU that aims to be binary compatible with the 8086 and with as many optimisations as possible
@@ -13,8 +12,9 @@ A CPU that aims to be binary compatible with the 8086 and with as many optimisat
* [ ] Is Out of Order
* [ ] Is superscalar
-### Building it
-To build this project you need Icarus Verilog, bin86, GNU make, xxd and the posix coreutils and run `make` on the top level directory.
+### Simulating it
+To simulate this project you need Icarus Verilog, bin86, GNU make, xxd and the posix coreutils.
+After that you can run `make` on the top level directory and it should build everything and start the simulation
At the time of development the versions used are :
diff --git a/boot_code/brainfuck_interpreter_v0.asm b/boot_code/brainfuck_interpreter_v0.asm
index 20d5fb7..b60f5dd 100644
--- a/boot_code/brainfuck_interpreter_v0.asm
+++ b/boot_code/brainfuck_interpreter_v0.asm
@@ -124,6 +124,6 @@ JMP INTERPRET
PROG_END:
hlt
-bootup_msg: .ASCII 'Brainfuck interpeter v0\n'
+bootup_msg: .ASCII 'Brainfuck interpreter v0\n'
bracket: .BLKB 280
data: .BLKB 560
diff --git a/system/decoder.v b/system/decoder.v
index 6029cfb..94b0429 100644
--- a/system/decoder.v
+++ b/system/decoder.v
@@ -381,7 +381,7 @@ always @( CIR ) begin
`invalid_instruction
end
2'b01: begin
- /* JMP - Uncoditional Jump direct within segment */
+ /* JMP - Unconditional Jump direct within segment */
/* 1 1 1 0 1 0 0 1 | IP-INC-LO | IP-INC-HI |*/
`invalid_instruction
end
@@ -413,7 +413,7 @@ always @( CIR ) begin
end
2'b01:begin
if(CIR[7:0]==8'h21) begin
- /* INT - execut interrupt handler */
+ /* INT - execute interrupt handler */
/* 1 1 0 0 1 1 0 1 | DATA |*/
has_operands=1;
opcode_size=0;
diff --git a/system/processor.v b/system/processor.v
index 9e33dcb..e3da91b 100644
--- a/system/processor.v
+++ b/system/processor.v
@@ -297,7 +297,7 @@ always @(posedge clock) begin
* word of the instruction which contains no useful
* data anymore but the ProgCount has the correct
* address so update it now so that whatever the case
- * external_data_bus contains at leat some unkown data */
+ * external_data_bus contains at least some unknown data */
one_byte_instruction=(!has_operands)&&(!opcode_size);
external_address_bus = ProgCount;
state=next_state;