From a189da249cb3fd08db912b391c0a1f7fc1dae116 Mon Sep 17 00:00:00 2001 From: "(Tim) Efthimis Kritikos" Date: Fri, 24 Feb 2023 05:01:55 +0000 Subject: [PATCH] Added STOS instruction. Native brainfuck compiler started generating code! --- system/decoder.v | 14 +++++++++++++- system/processor.v | 16 ++++++++-------- system/ucode.txt | 13 +++++++++++-- system/ucode_header.v | 3 ++- 4 files changed, 34 insertions(+), 12 deletions(-) diff --git a/system/decoder.v b/system/decoder.v index e66b3c2..4659a81 100644 --- a/system/decoder.v +++ b/system/decoder.v @@ -445,6 +445,18 @@ always @( CIR or SIMPLE_MICRO or seq_addr_input ) begin PARAM2=2; seq_addr_entry=`UCODE_RET_ENTRY; end + 11'b1010101x_xxx:begin + /* STOS - Write byte/word to [DI] and increment accordingly */ + /* | 1 0 1 0 1 0 1 W | */ + `start_unaligning_instruction + opcode_size=0; + has_operands=0; + Wbit=CIR[8:8]; + Sbit=0; + RM=101; + seq_addr_entry=`UCODE_STOS_ENTRY; + PARAM2=(Wbit==1)?2:1; + end default:begin `invalid_instruction end @@ -477,7 +489,7 @@ always @( CIR or SIMPLE_MICRO or seq_addr_input ) begin endcase reg_read_port1_addr=ucode_data[25:22]; IN_MOD =ucode_data[28:26]; - reg_read_port1_addr=ucode_data[32:29]; + reg_read_port2_addr=ucode_data[32:29]; end end diff --git a/system/processor.v b/system/processor.v index d44a880..3c17cb0 100644 --- a/system/processor.v +++ b/system/processor.v @@ -112,18 +112,18 @@ reg [2:0] IN_MOD; reg [2:0] OUT_MOD; mux4 #(.WIDTH(16)) MUX16_1A( - PARAM1, - reg_read_port1_data, - {ProgCount[14:0],unaligned_access^unaligning_instruction}, - 16'b0000000000000000, /*0 Constant*/ +/*0*/ PARAM1, +/*1*/ reg_read_port1_data, +/*2*/ {ProgCount[14:0],unaligned_access^unaligning_instruction}, +/*3*/ 16'b0000000000000000, /*0 Constant*/ in_alu1_sel1, ALU_1A); mux4 #(.WIDTH(16)) MUX16_1B( - PARAM2, - reg_read_port2_data, - {ProgCount[14:0],unaligned_access^unaligning_instruction}, - 16'b0000000000000000, /*0 Constant*/ +/*0*/ PARAM2, +/*1*/ reg_read_port2_data, +/*2*/ {ProgCount[14:0],unaligned_access^unaligning_instruction}, +/*3*/ 16'b0000000000000000, /*0 Constant*/ in_alu1_sel2, ALU_1B); diff --git a/system/ucode.txt b/system/ucode.txt index 1bf4766..9bb43da 100644 --- a/system/ucode.txt +++ b/system/ucode.txt @@ -17,6 +17,8 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +//rr2: reg_read_port2_addr +// //imd: IN_MOD // //rr1: reg_read_port1_addr @@ -48,12 +50,19 @@ @000 0000_000_000__00__00_0000__00_000000 -// 32 28 25 21 18 15 13 11 7 5 0 +// 32 28 25 21 18 15 13 11 7 5 0 +// CALL // rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M | @001 0000_011_1100_001_011__00__01_1100__01_000010 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1) @002 0000_011_zzzz_000_110__10__11_zzzz__00_000011 // ALU_1: 0 ALU_2: PC ALU_OP:ADD ALU_out: [SP] @003 0000_011_zzzz_000_101__10__00_zzzz__00_000000 // ALU_1: PARAM1 (arg) ALU_2: PC ALU_OP:ADD ALU_out: PC -// rr2|imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M | +// RET +// rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M | @004 0000_110_zzzz_000_101__00__11_zzzz__11_000101 // ALU_1: 0 ALU_2: PARAM2 ([SP) ALU_OP:ADD ALU_out: PC (also read [SP] to PARAM2) @005 0000_011_1100_000_011__01__00_1100__00_000000 // ALU_1: PARAM1 (2) ALU_2: SP ALU_OP:ADD ALU_out: SP + +// STOS +// rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M | +@006 1000_011_zzzz_000_000__01__11_zzzz__00_000111 // ALU_1: 0 ALU_2: AX ALU_OP:ADD ALU_out: [DI] +@007 zzzz_011_1111_000_011__00__01_1111__00_000000 // ALU_1: DI ALU_2: PARAM2 (2) ALU_OP:ADD ALU_OUT: DI diff --git a/system/ucode_header.v b/system/ucode_header.v index 22b841c..5fe32d8 100644 --- a/system/ucode_header.v +++ b/system/ucode_header.v @@ -19,9 +19,10 @@ `define UCODE_ADDR_BITS 5 `define UCODE_DATA_BITS 33 -`define UCODE_SIZE 6 +`define UCODE_SIZE 8 /* DEFINE ADDRESSES IN THE MICROCODE */ `define UCODE_NO_INSTRUCTION 5'b00000 `define UCODE_CALL_ENTRY 5'b00001 `define UCODE_RET_ENTRY 5'b00100 +`define UCODE_STOS_ENTRY 5'b00110