diff --git a/Makefile b/Makefile
index 3c9059d..b4d42d4 100644
--- a/Makefile
+++ b/Makefile
@@ -23,6 +23,9 @@ GTKWSAVE=./gtkwave_savefile.gtkw
MICROCODE=system/ucode.txt
BOOTABLES=boot_code/brainfuck_compiled.txt boot_code/brainfuck_interpreted.txt ${BOOT_CODE}
+shim:
+ @echo The processor\'s output handling is being rewritten so the usual mandelbrot program isn\'t working. please git checkout d93c92c00572d812c76d1b42969741d8cfce8d4d
+
NO_ASM=1
include common.mk
diff --git a/boot_code/brainfuck_compiled.asm b/boot_code/brainfuck_compiled.asm
index 0c7d7ba..0bb9eb3 100644
--- a/boot_code/brainfuck_compiled.asm
+++ b/boot_code/brainfuck_compiled.asm
@@ -1,5 +1,10 @@
+org 0x100
INCLUDE brainfuck_compiler_v1.asm
prog:
INCLUDE hello_9086.bf.asm
output_program:
+
+.ORG 0xFFF0
+MOV AX,#0x0100
+JMP AX
diff --git a/boot_code/brainfuck_interpreted.asm b/boot_code/brainfuck_interpreted.asm
index 0dda918..2b8c8ce 100644
--- a/boot_code/brainfuck_interpreted.asm
+++ b/boot_code/brainfuck_interpreted.asm
@@ -1,4 +1,9 @@
+ORG 0x100
INCLUDE brainfuck_interpreter_v0.asm
prog:
INCLUDE hello_9086.bf.asm
+
+.ORG 0xFFF0
+MOV AX,#0x0100
+JMP AX
diff --git a/boot_code/brainfuck_mandelbrot.asm b/boot_code/brainfuck_mandelbrot.asm
index d261bd9..3fff94a 100644
--- a/boot_code/brainfuck_mandelbrot.asm
+++ b/boot_code/brainfuck_mandelbrot.asm
@@ -1,6 +1,11 @@
+ORG 0x100
INCLUDE brainfuck_compiler_v1.asm
prog:
INCLUDE mandelbrot.bf.asm
output_program:
+
+.ORG 0xFFF0
+MOV AX,#0x0100
+JMP AX
diff --git a/common.mk b/common.mk
index 8dc8ef1..d3d7f30 100644
--- a/common.mk
+++ b/common.mk
@@ -35,7 +35,7 @@ disas: $(subst .txt,.disas,${BOOT_CODE})
# Assembling code
%.txt:%.bin
- ${Q}dd if=/dev/zero bs=1 count=32768 of="$(subst .bin,.stage,$<)" status=none
+ ${Q}dd if=/dev/zero bs=1 count=65536 of="$(subst .bin,.stage,$<)" status=none
${Q}dd if="$<" of="$(subst .bin,.stage,$<)" conv=notrunc,nocreat status=none
${Q}xxd -ps -c 2 "$(subst .bin,.stage,$<)" > "$@"
${Q}rm "$(subst .bin,.stage,$<)"
diff --git a/system/alu.v b/system/alu.v
index 4ae3a79..53ebac8 100644
--- a/system/alu.v
+++ b/system/alu.v
@@ -38,10 +38,7 @@ always @ ( * ) begin
`ALU_OP_AND: begin C_FLAG=0;OUT=A&B; end
`ALU_OP_OR: begin C_FLAG=0;OUT=A|B; end
`ALU_OP_XOR: begin C_FLAG=0;OUT=A^B; end
- default:begin
- OUT=0;
- C_FLAG=0;
- end
+ `ALU_OP_SHIFT_LEFT: begin C_FLAG=(A&16'h8000)==16'h8000;OUT=A<. */
+//mas: MemIo Address Select
+// 0: register file output 1: alu output
//wbo: Wbit overwrite, {VALUE,ENABLE}. ex 11 would force one, 10 wouldn't do anything
//
//krs: Keep registers, selects weather the register port 1 and/or 2
@@ -38,8 +40,9 @@
// 100:ALU_OP_XOR
// 101:ALU_OP_ADD_SIGNED_B
// 110:ALU_OP_SUB_REVERSE
+// 111:ALU_OP_SHIFT_LEFT
//
-//a1o: OUT_MOD. Handled in `PROC_EX_STATE_EXIT
+//a1o: OUT_MOD. Handled in `PROC_EX_STATE_ENTRY
//
//a12: In ALU 1 sel 2
//
@@ -48,38 +51,49 @@
//rwa: Register Write Address
//
//nxs: Next State
-// 00: PROC_EX_STATE_ENTRY
-// 01: PROC_DE_LOAD_16_PARAM
-// 10: PROC_DE_LOAD_8_PARAM
-// 11: PROC_MEMIO_READ
+// 000: PROC_EX_STATE_ENTRY
+// 001: PROC_DE_LOAD_16_PARAM
+// 010: PROC_DE_LOAD_8_PARAM
+// 011: PROC_MEMIO_READ
+// 100: PROC_MEMIO_READ_SETADDR (used when addressing based on ALU_OUT
//
//Nxt M: Next microcode address
-@000 _00_000_0000_000_0000_000_000__00__00_0000__00_000000
-// 36 34 32 28 25 21 18 15 13 11 7 5 0
-// CALL
-// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
-@001 _00_000_0000_011_1100_001_011__00__01_1100__01_000010 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1)
-@002 _00_000_0000_011_xxxx_000_110__10__11_xxxx__00_000011 // ALU_1: 0 ALU_2: PC ALU_OP:ADD ALU_out: [SP]
-@003 _00_000_0000_011_xxxx_000_101__10__00_xxxx__00_000000 // ALU_1: PARAM1 (arg) ALU_2: PC ALU_OP:ADD ALU_out: PC
-
-// RET
-// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
-@004 _00_000_0000_110_xxxx_000_101__00__11_xxxx__11_000101 // ALU_1: 0 ALU_2: PARAM2 ([SP]) ALU_OP:ADD ALU_out: PC (also read [SP] to PARAM2)
-@005 _00_000_1100_011_0000_000_011__01__00_1100__00_000000 // ALU_1: PARAM1 (2) ALU_2: SP ALU_OP:ADD ALU_out: SP
-
-// STOS
-// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
-@006 _00_000_1000_011_xxxx_000_000__01__11_xxxx__00_000111 // ALU_1: 0 ALU_2: AX ALU_OP:ADD ALU_out: [DI]
-@007 _11_000_xxxx_011_1111_000_011__00__01_1111__00_000000 // ALU_1: DI ALU_2: PARAM2 (2) ALU_OP:ADD ALU_OUT: DI
-
-// PUSH
-// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
-@008 _00_010_0000_011_1100_001_011__00__01_1100__00_001001 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1)
-@009 _00_010_0000_011_xxxx_000_110__01__11_xxxx__00_000000 // ALU_1: 0 ALU_2: REG ALU_OP:ADD ALU_out: [SP]
+// 39 38 36 33 29 26 22 19 16 14 12 8 5 0
+// INT
+// mas|wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
+@00c __0__00_000_0000_011_1100_001_011__00__01_1100_010_001101 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1)
+@00d __0__00_000_0000_011_xxxx_000_110__10__11_xxxx_000_001110 // ALU_1: 0 ALU_2: PC ALU_OP:ADD ALU_out: [SP]
+/* We read the parameter and get the address to jump on ALU_OUT */
+@00e __0__00_000_xxxx_011_xxxx_111_111__00__00_xxxx_000_001111 // ALU_1: PARAM1 (arg) ALU_2: PARAM2 (2) ALU_OP:SHIFT ALU_out: PARAM1
+@00f __1__00_000_xxxx_011_xxxx_000_100__00__00_xxxx_100_010000 // ALU_1: PARAM1 (base int table addr) ALU_2: PARAM2 (2) ALU_OP:ADD ALU_out: NULL
+@010 __0__00_000_xxxx_011_xxxx_000_101__00__11_xxxx_000_000000 // ALU_1: 0 ALU_2: PARAM2 (address) ALU_OP:SHIFT ALU_out: PC
// POP
-// wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
-@00a _00_100_0000_110_xxxx_011_011__00__11_xxxx__11_001011 // ALU_1: 0 ALU_2: PARAM2 ([SP]) ALU_OP:ADD ALU_out: REG
-@00b _00_000_1100_011_0000_000_011__01__00_1100__00_000000 // ALU_1: PARAM1 (2) ALU_2: SP ALU_OP:ADD ALU_out: SP
+// mas|wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
+@00a __0__00_100_0000_110_xxxx_011_011__00__11_xxxx_011_001011 // ALU_1: 0 ALU_2: PARAM2 ([SP]) ALU_OP:ADD ALU_out: REG
+@00b __0__00_000_1100_011_0000_000_011__01__00_1100_000_000000 // ALU_1: PARAM1 (2) ALU_2: SP ALU_OP:ADD ALU_out: SP
+
+// PUSH
+// mas|wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
+@008 __0__00_010_0000_011_1100_001_011__00__01_1100_000_001001 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1)
+@009 __0__00_010_0000_011_xxxx_000_110__01__11_xxxx_000_000000 // ALU_1: 0 ALU_2: REG ALU_OP:ADD ALU_out: [SP]
+
+// STOS
+// mas|wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
+@006 __0__00_000_1000_011_xxxx_000_000__01__11_xxxx_000_000111 // ALU_1: 0 ALU_2: AX ALU_OP:ADD ALU_out: [DI]
+@007 __0__11_000_xxxx_011_1111_000_011__00__01_1111_000_000000 // ALU_1: DI ALU_2: PARAM2 (2) ALU_OP:ADD ALU_OUT: DI
+
+// RET
+// mas|wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
+@004 __0__00_000_0000_110_xxxx_000_101__00__11_xxxx_011_000101 // ALU_1: 0 ALU_2: PARAM2 ([SP]) ALU_OP:ADD ALU_out: PC (also read [SP] to PARAM2)
+@005 __0__00_000_1100_011_0000_000_011__01__00_1100_000_000000 // ALU_1: PARAM1 (2) ALU_2: SP ALU_OP:ADD ALU_out: SP
+
+// CALL
+// mas|wbo|krs|rr2 |imd|rr1 |a1f|a1o|a12|a11|rwa |nxs|Nxt M |
+@001 __0__00_000_0000_011_1100_001_011__00__01_1100_001_000010 // ALU_1: SP ALU_2: PARAM2 (2) ALU_OP:SUB ALU_out: SP (also fetch the opcode argument to PARAM1)
+@002 __0__00_000_0000_011_xxxx_000_110__10__11_xxxx_000_000011 // ALU_1: 0 ALU_2: PC ALU_OP:ADD ALU_out: [SP]
+@003 __0__00_000_0000_011_xxxx_000_101__10__00_xxxx_000_000000 // ALU_1: PARAM1 (arg) ALU_2: PC ALU_OP:ADD ALU_out: PC
+
+@000 __0__00_000_0000_000_0000_000_000__00__00_0000_000_000000
diff --git a/system/ucode_header.v b/system/ucode_header.v
index 3ac1a28..d508aaa 100644
--- a/system/ucode_header.v
+++ b/system/ucode_header.v
@@ -17,14 +17,15 @@
You should have received a copy of the GNU General Public License
along with this program. If not, see . */
-`define UCODE_SIZE 12
-`define UCODE_DATA_BITS 38
+`define UCODE_SIZE 17
+`define UCODE_DATA_BITS 40
`define UCODE_ADDR_BITS $clog2(`UCODE_SIZE)
/* DEFINE ADDRESSES IN THE MICROCODE */
-`define UCODE_NO_INSTRUCTION 4'b0000
-`define UCODE_CALL_ENTRY 4'b0001
-`define UCODE_RET_ENTRY 4'b0100
-`define UCODE_STOS_ENTRY 4'b0110
-`define UCODE_PUSH_ENTRY 4'b1000
-`define UCODE_POP_ENTRY 4'b1010
+`define UCODE_NO_INSTRUCTION 5'b00000
+`define UCODE_CALL_ENTRY 5'b00001
+`define UCODE_RET_ENTRY 5'b00100
+`define UCODE_STOS_ENTRY 5'b00110
+`define UCODE_PUSH_ENTRY 5'b01000
+`define UCODE_POP_ENTRY 5'b01010
+`define UCODE_INT_ENTRY 5'b01100