From 8281c9a21fa6c29f8b05a512cc20c0f9eb53bbe5 Mon Sep 17 00:00:00 2001 From: "(Tim) Efthimis Kritikos" Date: Sun, 10 Dec 2023 04:37:07 +0000 Subject: [PATCH] FPGA_Board/OrangeCrab_r0.2.1: Switched the GPIO 0/1 pins for I2C to the dedicated ones --- system/fpga_config/OrangeCrab_r0.2.1/fpga_top.v | 8 ++++---- system/fpga_config/OrangeCrab_r0.2.1/pin_constraint.pcf | 5 ++++- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/system/fpga_config/OrangeCrab_r0.2.1/fpga_top.v b/system/fpga_config/OrangeCrab_r0.2.1/fpga_top.v index 201e689..24e959e 100644 --- a/system/fpga_config/OrangeCrab_r0.2.1/fpga_top.v +++ b/system/fpga_config/OrangeCrab_r0.2.1/fpga_top.v @@ -48,8 +48,8 @@ module fpga_top( output wire [5:0] ddram_vccio, output wire ddram_we_n, - inout gpio_0,/*sda*/ - output gpio_1 /*scl*/ + inout i2c_sda,/*sda*/ + output i2c_scl /*scl*/ `else output i2c_dir, output i2c_scl, @@ -493,7 +493,7 @@ TRELLIS_IO #( .DIR ("BIDIR") ) TRELLIS_IO_00 ( // pin - .B (gpio_0), + .B (i2c_sda), //input .I (1'd0), //Direction @@ -502,7 +502,7 @@ TRELLIS_IO #( .O (SDA_input) ); -assign gpio_1=SCL; +assign i2c_scl=SCL; `else diff --git a/system/fpga_config/OrangeCrab_r0.2.1/pin_constraint.pcf b/system/fpga_config/OrangeCrab_r0.2.1/pin_constraint.pcf index ce6be11..9323d8e 100644 --- a/system/fpga_config/OrangeCrab_r0.2.1/pin_constraint.pcf +++ b/system/fpga_config/OrangeCrab_r0.2.1/pin_constraint.pcf @@ -1,7 +1,6 @@ LOCATE COMP "clk48" SITE "A9"; IOBUF PORT "clk48" IO_TYPE=LVCMOS33; FREQUENCY PORT "clk48" 48.0 MHz; - LOCATE COMP "ddram_a[0]" SITE "C4"; IOBUF PORT "ddram_a[0]" SLEWRATE=FAST; IOBUF PORT "ddram_a[0]" IO_TYPE=SSTL135_I; @@ -252,3 +251,7 @@ LOCATE COMP "usb_d_n" SITE "M2"; IOBUF PORT "usb_d_n" IO_TYPE=LVCMOS33; LOCATE COMP "usb_pullup" SITE "N2"; IOBUF PORT "usb_pullup" IO_TYPE=LVCMOS33; +LOCATE COMP "i2c_sda" SITE "C10"; +IOBUF PORT "i2c_sda" IO_TYPE=LVCMOS33; +LOCATE COMP "i2c_scl" SITE "C9"; +IOBUF PORT "i2c_scl" IO_TYPE=LVCMOS33;