diff --git a/system/decoder.v b/system/decoder.v
index 5beedb3..c1c8ea2 100644
--- a/system/decoder.v
+++ b/system/decoder.v
@@ -75,13 +75,16 @@ microcode ucode(seq_addr_input,ucode_data);
 `define start_aligning_instruction unaligning=0;
 `define start_unaligning_instruction unaligning=1;
 
+//TODO: A possible optimisation for instruction with 8bit parameter and
+//opcode_size=0 would be to set PARAM1 here instead of sending execution over
+//to PROC_DE_LOAD_8_PARAM
 
 always @( CIR or SIMPLE_MICRO or seq_addr_input ) begin
 	if (SIMPLE_MICRO==0)begin
 		ERROR=0;HALT=0;seq_addr_entry=`UCODE_NO_INSTRUCTION;
 		casex({CIR[15:8],CIR[5:3]})
 			11'b0000_010x_xxx : begin
-				/*       Add Immediate word/byte to accumulator           */
+				/*     ADD - Add Immediate word/byte to accumulator       */
 				/* 0 0 0 0  0 1 0 W |       DATA       |     DATA if W   |*/
 				opcode_size=0;
 				has_operands=1;
@@ -97,34 +100,44 @@ always @( CIR or SIMPLE_MICRO or seq_addr_input ) begin
 				reg_read_port2_addr={Wbit,3'b000};
 				reg_write_addr={Wbit,3'b000};
 				ALU_1OP=`ALU_OP_ADD;
-				if(Wbit==1)
-					next_state=`PROC_DE_LOAD_16_PARAM;
-				else begin
-					PARAM1[7:0]=CIR[7:0];
-					next_state=`PROC_EX_STATE_ENTRY;
-				end
+				case({Sbit,Wbit})
+					2'b00,2'b11:
+						next_state=`PROC_DE_LOAD_8_PARAM;
+					2'b01:
+						next_state=`PROC_DE_LOAD_16_PARAM;
+					default:begin
+						`invalid_instruction
+					end
+				endcase
 			end
 			11'b1000_00xx_000 : begin
-				/* Add Immediate word/byte to register/memory */
+				/*                                  ADD - Add Immediate word/byte to register/memory                                      */
 				/* 1 0 0 0  0 0 S W | MOD 0 0  0  R/M  |     < DISP LO >  |     < DISP HI >   |      DATA        |      DATA if W    |    */
-				`start_aligning_instruction
 				opcode_size=1;
 				has_operands=1;
 				Wbit=CIR[8:8];
 				Sbit=CIR[9:9];
-				IN_MOD=2'b11;
+				IN_MOD=CIR[7:6];
+				RM=CIR[2:0];
 				in_alu1_sel1=2'b00;
 				in_alu1_sel2=2'b01;
 				OUT_MOD={1'b0,IN_MOD};
 				reg_read_port2_addr={Wbit,RM};
 				reg_write_addr={Wbit,RM};
 				ALU_1OP=`ALU_OP_ADD;
-				next_state=`PROC_DE_LOAD_16_PARAM;
-				if(Wbit==1)
-					next_state=`PROC_DE_LOAD_16_PARAM;
-				else begin
-					`invalid_instruction /*do 8bit loads*/
-				end
+				case({Sbit,Wbit})
+					2'b00,2'b11:begin
+						`start_unaligning_instruction
+						next_state=`PROC_DE_LOAD_8_PARAM;
+					end
+					2'b01:begin
+						`start_aligning_instruction
+						next_state=`PROC_DE_LOAD_16_PARAM;
+					end
+					default:begin
+						`invalid_instruction
+					end
+				endcase
 			end
 			11'b1000_00xx_111 : begin
 				/*                                  CMP - compare Immediate with register / memory                                        */