diff --git a/system/decoder.v b/system/decoder.v index 41af825..afa7312 100644 --- a/system/decoder.v +++ b/system/decoder.v @@ -107,7 +107,7 @@ wire [`UCODE_DATA_BITS-1:0] ucode_data; microcode ucode(seq_addr_input,ucode_data); -`define invalid_instruction next_state=`EXEC_DONE;ERROR<=`ERR_UNIMPL_INSTRUCTION;IN_MOD=3'b011;seq_addr_entry<=`UCODE_NO_INSTRUCTION; +`define invalid_instruction next_state=`EXEC_WAIT;ERROR<=`ERR_UNIMPL_INSTRUCTION;IN_MOD=3'b011;seq_addr_entry<=`UCODE_NO_INSTRUCTION; //TODO: A possible optimisation for instruction with 8bit parameter and @@ -362,7 +362,7 @@ always @( FLAGS or CIR or SIMPLE_MICRO or seq_addr_input ) begin ERROR<=`ERR_NO_ERROR; MEM_OR_IO=0; seq_addr_entry<=`UCODE_NO_INSTRUCTION; - next_state=`EXEC_HALT; + next_state=`EXEC_WAIT; DEPENDS_ON_PREVIOUS<=0; memio_address_select=0; end diff --git a/system/exec_state_def.v b/system/exec_state_def.v index 10d4ba1..b3c9c11 100644 --- a/system/exec_state_def.v +++ b/system/exec_state_def.v @@ -21,9 +21,7 @@ `define EXEC_STATE_BITS 4 -`define EXEC_HALT 4'b0000 - -`define EXEC_DONE 4'b1100 +`define EXEC_WAIT 4'b1100 /*DECODE SATE*/ `define EXEC_DE_LOAD_16_PARAM 4'b0010 diff --git a/system/execute.v b/system/execute.v index 3acf496..97f74fc 100644 --- a/system/execute.v +++ b/system/execute.v @@ -69,13 +69,11 @@ ALU ALU1( /*############ Execute logic ########################################################## */ -always @(posedge valid_input) begin - if(exec_state == `EXEC_DONE) begin - exec_state <= init_state; - reg_write_we <= 1; - biu_jump_req <= 0; - use_exec_reg_addr <= 0; - end +always @(valid_input) begin + exec_state <= init_state; + reg_write_we <= 1; + biu_jump_req <= 0; + use_exec_reg_addr <= 0; end always @( set_initial_values) begin @@ -84,14 +82,16 @@ always @( set_initial_values) begin end always @(negedge reset) begin - exec_state <= `EXEC_HALT; + exec_state <= `EXEC_WAIT; end always @(posedge reset) begin exec_state <= `EXEC_RESET; end -`define unimpl_addressing_mode exec_state <= `EXEC_DONE;ERROR <= `ERR_UNIMPL_ADDRESSING_MODE; +`define unimpl_addressing_mode exec_state <= `EXEC_WAIT;ERROR <= `ERR_UNIMPL_ADDRESSING_MODE; + +`define finished_instruction next_exec<=!next_exec; exec_state <= `EXEC_WAIT; always @(posedge clock) begin case (exec_state) @@ -101,16 +101,13 @@ always @(posedge clock) begin biu_data_direction <= 0; biu_jump_req <= 0; reg_write_we <= 1; - exec_state <= `EXEC_DONE; + exec_state <= `EXEC_WAIT; next_exec <= 0; ERROR <= `ERR_NO_ERROR; end - `EXEC_DONE:begin + `EXEC_WAIT:begin reg_write_we <= 1; use_exec_reg_addr <= 0; - if(valid_input)begin - exec_state <= init_state; - end end `EXEC_DE_LOAD_REG_TO_PARAM:begin PARAM2<=reg_read_port2_data; @@ -235,9 +232,8 @@ always @(posedge clock) begin end end `EXEC_NEXT_INSTRUCTION:begin - next_exec <= !next_exec; + `finished_instruction /*necessary for biu to see we went on another state from decode to give us a new instruction*/ - exec_state <= `EXEC_DONE; end `EXEC_WRITE_ENTRY:begin FLAGS[7:0] <= ALU_FLAGS[7:0]; @@ -291,12 +287,10 @@ always @(posedge clock) begin end 3'b011:begin reg_write_we <= 0; - exec_state <= `EXEC_DONE; - next_exec <= !next_exec; + `finished_instruction end 3'b100:begin /*No output*/ - exec_state <= `EXEC_DONE; - next_exec <= !next_exec; + `finished_instruction end 3'b101:begin /* Program Counter*/ BIU_ADDRESS_INPUT <= ALU_O[15:0]; @@ -310,8 +304,7 @@ always @(posedge clock) begin end 3'b111:begin /* Write to PRAM1 (for microcode calculations) */ PARAM1 <= ALU_O; - exec_state <= `EXEC_DONE; - next_exec <= !next_exec; + `finished_instruction end default:begin `unimpl_addressing_mode @@ -320,8 +313,7 @@ always @(posedge clock) begin end `EXEC_JUMP_RELEASE:begin biu_jump_req <= 0; - exec_state <= `EXEC_DONE; - next_exec <= !next_exec; + `finished_instruction end `EXEC_MEMIO_WRITE:begin /* if memio_address_select == 0 ADDRESS: reg_read_port1_data DATA:ALU1_O */ @@ -336,12 +328,9 @@ always @(posedge clock) begin if (write == 0) begin //TODO: don't do it that was or better yet don't do it at all somehow biu_write_request <= 0; - exec_state <= `EXEC_DONE; - next_exec <= !next_exec; + `finished_instruction end - end - `EXEC_HALT:begin end default:begin end diff --git a/system/processor.v b/system/processor.v index bd5c6a9..e31361f 100644 --- a/system/processor.v +++ b/system/processor.v @@ -227,10 +227,9 @@ always @(next_exec) begin ProgCount <= INSTRUCTION_LOCATION+{12'b0,instr_end}; INSTRUCTION_BUFFER<=INSTRUCTION[23:0]; wait_exec<=1; - valid_exec_data<=1; + valid_exec_data<=!valid_exec_data; end else begin wait_exec<=0; - valid_exec_data<=0; end end @@ -246,6 +245,7 @@ always @(posedge clock) begin owe_set_init <= 0; set_initial_values<=0; wait_exec<=0; + valid_exec_data<=0; end `PROC_DE_STATE_ENTRY:begin if( VALID_INSTRUCTION==1 || SIMPLE_MICRO == 1 ) begin @@ -274,7 +274,7 @@ always @(posedge clock) begin /*keep proc_state the same and rerun decode this time with all the data from the microcode rom*/ end else begin /* This runs at the start of each execution cycle, with microcode this is more than once per 8086 instruction */ - valid_exec_data <= 1; + valid_exec_data<=!valid_exec_data; if( SIMPLE_MICRO == 1 ) begin ucode_seq_addr <= ucode_seq_addr_entry; /*Reused for next address*/ if( ucode_seq_addr_entry == `UCODE_NO_INSTRUCTION )begin @@ -284,15 +284,6 @@ always @(posedge clock) begin end wait_exec<=1; end - end else begin - if( DE_DEPENDS_ON_PREVIOUS == 0 ) - if ( (ucode_seq_addr==`UCODE_NO_INSTRUCTION) && (ucode_seq_addr_entry!=`UCODE_NO_INSTRUCTION) && valid_exec_data==0 )begin - /*switch to microcode decoding*/ - ucode_seq_addr <= ucode_seq_addr_entry; - SIMPLE_MICRO <= 1; - owe_set_init <= 1; - /*keep proc_state the same and rerun decode this time with all the data from the microcode rom*/ - end end end end @@ -304,7 +295,7 @@ always @(posedge clock) begin end always @(exec_state) begin - if(exec_state == `EXEC_DONE) + if(exec_state == `EXEC_WAIT) FLAGS <= {8'b0,EXEC_FLAGS}; //TODO: don't set all of them all the time! end