diff --git a/common.mk b/common.mk
index 8658eed..40c0197 100644
--- a/common.mk
+++ b/common.mk
@@ -52,7 +52,7 @@ ifeq "${QUIET}" "1"
 
        QUIET_CLEAN	= @echo   '  CLEAN      '${PRINT_PATH_PREFIX};
        QUIET_MRPROPER	= @echo   '  MRPROPER   '${PRINT_PATH_PREFIX};
-       QUIET_VERILATOR_RUN = @printf '  %s  %s\n' $1 $2;
+       QUIET_VERILATOR_RUN = @printf '  %s  %s\n' $(shell basename "$1") $2;
        Q = @
        MAKEOPTS=--no-print-directory
 .SILENT:
diff --git a/system/Makefile b/system/Makefile
index 6bd0b70..3ad2979 100644
--- a/system/Makefile
+++ b/system/Makefile
@@ -87,6 +87,7 @@ ${VERILATOR_BIN}: ${VERILATOR_BIN}.mk
 ${VERILATOR_BIN}.mk: ${VERILATOR_TESTBENCH} ${SIMULATED_SOURCES}
 	${QUIET_VERILATOR}
 	mkdir -p ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/
+	rm -f ${VERILATOR_BIN}.mk # Verilator doesn't update this when just changing the testbench and the makefile breaks so we remove it to make sure
 	${Q}verilator -DCALCULATE_IPC -DOUTPUT_JSON_STATISTICS ${VERILATOR_OPTS} $^
 
 ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/${VERILATOR_FPGA_BIN}: ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/${VERILATOR_FPGA_BIN}.mk
@@ -94,11 +95,12 @@ ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/${VERILATOR_FPGA_BIN}: ${BUILD_FILES_PRE
 
 ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/${VERILATOR_FPGA_BIN}.mk: fpga_config/${FPGA_BOARD}/testbench.cpp ${FPGA_SIM_SOURCES}
 	${QUIET_VERILATOR}
-	mkdir -p "${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/"
+	mkdir -p "${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/" # Verilator doesn't update this when just changing the testbench and the makefile breaks so we remove it to make sure
+	rm -f ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/${VERILATOR_FPGA_BIN}.mk
 	${Q}verilator -DCALCULATE_IPC -DOUTPUT_JSON_STATISTICS --Mdir ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/ ${VERILATOR_OPTS} ../../fpga_config/${FPGA_BOARD}/testbench.cpp ${FPGA_SIM_SOURCES}
 
 .PHONY: fpga_sim
-fpga_sim fpga_sim.fst: ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/${VERILATOR_FPGA_BIN} ${MICROCODE} simplified_ucode.txt ../boot_code/bios.stxt
+fpga_sim fpga_sim.fst: ../boot_code/bios.stxt ${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/${VERILATOR_FPGA_BIN} ${MICROCODE} simplified_ucode.txt
 	$(call QUIET_VERILATOR_RUN,$(word 2,$^),$<)
 	${Q} ${NUMACTL} "${BUILD_FILES_PREFIX}/sim_${FPGA_BOARD}/${VERILATOR_FPGA_BIN}" +VERSION=${VERSION} +WAVEFORM="fpga_sim.fst" +COMMIT=${COMMIT} +BOOT_CODE="../boot_code/bios.stxt" +MICROCODE="simplified_ucode.txt"
 
diff --git a/system/verilator_makefile_fpga b/system/verilator_makefile_fpga
index ce55106..1a97939 100644
--- a/system/verilator_makefile_fpga
+++ b/system/verilator_makefile_fpga
@@ -1,7 +1,7 @@
 # This file is basically to make verilator compilation look pretty.
 # If the project doesn't compile it might be because verilator handles compilation
 # differently and this patch doesn't work anymore. In such case remove everything
-# except the include Vsystem.mk line and try again.
+# except the include Vfpga_top.mk line and try again.
 VM_DEFAULT_RULES=0
 
 include Vfpga_top.mk
diff --git a/tools/docker_build_tests.sh b/tools/docker_build_tests.sh
index 3ab977a..461fcf5 100755
--- a/tools/docker_build_tests.sh
+++ b/tools/docker_build_tests.sh
@@ -21,7 +21,7 @@ do_test(){
 			SYSTEM_UPDATE="pacman --noconfirm -Sy make verilator xxd bin86 gcc python"
 			;;
 	esac
-	if tar c "$PROJDIRNAME" | docker run -i "$1" bash -c 'set -eu;tar x ;'"$SYSTEM_UPDATE"'; cd 9086; make clean;  if [ "$(make -j boot_code/gnome_sort.run| tail -n5|head -n 1)" = "06 09 17 18 1F 21 33 37 3A 3F 44 4F 51 51 54 5D 8B 99 A5 AE DB DF E9 EE " ];then echo pass;else echo failed check; exit 1;fi ' > /dev/null 2>/dev/null
+	if tar c "$PROJDIRNAME" | docker run -i "$1" bash -c 'set -eu;tar x ;'"$SYSTEM_UPDATE"'; cd 9086; make mrproper;  if [ "$(make -j boot_code/gnome_sort.run| tail -n5|head -n 1)" = "06 09 17 18 1F 21 33 37 3A 3F 44 4F 51 51 54 5D 8B 99 A5 AE DB DF E9 EE " ];then echo pass;else echo failed check; exit 1;fi ' > /dev/null 2>/dev/null
 	then
 		return 0
 	else